A Low-Power CMOS Spiking Neuron Design with Frequency Adaptation in 180nm Technology at 300mV Supply
Design of Four Bit Shift Register by using D Flip Flop in 16nm Predictive Technology Model
Low Power and Highly Stable 10T SRAM Cell Design Using Stacked and MTCMOS Techniques
Optimized High-speed Receiver Analog Front-end Design Using Cascaded Transimpedance Amplifier and Continuous-time Linear Equalizer for Signal Processing
Design and Implementation of Output Buffer in a 14nm CMOS
A Full Time-Based Buck Converter with Adaptive Gain and Linear Feedforward Compensation
Design and analysis of CMOS low power variable gain amplifier for biomedical applications
A high linearity and double input range switching scheme for SAR ADC without switching energy in the first four MSBs
Highly Efficient Analog Emulator Circuit of Memristive Behavior as a Replacement for Real Memristor
Design and Simulation of a Low Voltage Bandgap Reference Circuit in 0.18 µm CMOS technology for the Supply Range of 1.6 to 4.15V
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